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The map_list Class

As described in Section 9.2 the map_list class is used to pass over mapping information to the simulation kernel. Based on this information the kernel establishes all links between actuals and formals respectively in case of generic parameters it passes over a permanent copy of actual parameter to the constructor of the new component. Hence, the parameters may be destroyed after they were passed over to the map_list instance.

Example: The VHDL code

entity incr1 is 
 port (p1, p2 : inout integer);
end incr1;

entity top is 
end model;
architecture struct of top is
	signal a, b : integer := 0;
comp1: entity incr1 port map (p1 => a, p2 => b);
end struct;
is converted into the following constructor for architecture ``struct'':
/* Architecture constructor */
L7testlib_E3top_A6struct(name_stack &iname, map_list *mlist) :
  L7testlib_E3top(iname, mlist) {
    iname.push(":struct"); // add the architecture name to the name stack
    S1a = new sig_info<L3std_Q8standard_T7integer>
     (iname.push(":a"), L3std_Q8standard_I7integer_INFO, vREGISTER, NULL);
    S1b = new sig_info<L3std_Q8standard_T7integer>
     (iname.set(":b"), L3std_Q8standard_I7integer_INFO, vREGISTER, NULL);
    iname.pop(); /* pop last declaration name from name stack */

     map_list ml; // create a now map_list instance to store mapping information
     ml.signal_map(":p1",NULL,S1a,NULL); // map actual signal ``a'' to
                                         // formal port ``p1''
     ml.signal_map(":p2",NULL,S1b,NULL); // map actual signal ``b'' to 
                                         // formal port ``p2''
     iname.push(":comp1"); // create the name of the new component
     // call the kernel function to elaborate the component. Note,
     // the library and architecture name are not defined in the statement ("").
     // Hence, the default library and architecture are used.
     iname.pop(); // remove the component name form the name stack

    iname.pop(); /* pop architecture name from name stack */